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author | Mike Li <Tianxinmike.Li@amd.com> | 2021-03-26 15:14:12 -0400 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2021-05-10 18:06:45 -0400 |
commit | 74abbdedc33e5385be9bcf13918c742d91718fe5 (patch) | |
tree | 2f70f81e81209573c45a1b3722f6d2c4a4b90211 /drivers/gpu/drm/amd/amdgpu/soc15.c | |
parent | fb6372652391bb5b812669d763295ac1929ef42a (diff) | |
download | linux-74abbdedc33e5385be9bcf13918c742d91718fe5.tar.gz linux-74abbdedc33e5385be9bcf13918c742d91718fe5.tar.bz2 linux-74abbdedc33e5385be9bcf13918c742d91718fe5.zip |
drm/amdkfd: Update L1 and add L2/3 cache information
The L1 cache information has been updated and the L2/L3
information has been added. The changes have been made
for Vega10 and newer ASICs. There are no changes
for the older ASICs before Vega10.
Signed-off-by: Mike Li <Tianxinmike.Li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/soc15.c')
0 files changed, 0 insertions, 0 deletions