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| author | Yang Wang <kevinyang.wang@amd.com> | 2023-09-27 11:39:30 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2023-10-13 11:35:45 -0400 |
| commit | dd401cd29a887a1f7f46a52d6275c5d0daeb9cf3 (patch) | |
| tree | f526b1aec8733fe60333cae51ff2fff6b511f804 /drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c | |
| parent | 5b1270beb3801d328b43577a8bb1152d435bb146 (diff) | |
| download | linux-dd401cd29a887a1f7f46a52d6275c5d0daeb9cf3.tar.gz linux-dd401cd29a887a1f7f46a52d6275c5d0daeb9cf3.tar.bz2 linux-dd401cd29a887a1f7f46a52d6275c5d0daeb9cf3.zip | |
drm/amdgpu: add RAS error info support for sdma_v4_4_2.
add RAS error info support for sdma_v4_4_2.
Signed-off-by: Yang Wang <kevinyang.wang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c index 3b6990ef403a..31aa245552d6 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c @@ -2130,6 +2130,11 @@ static void sdma_v4_4_2_inst_query_ras_error_count(struct amdgpu_device *adev, { struct ras_err_data *err_data = (struct ras_err_data *)ras_err_status; uint32_t sdma_dev_inst = GET_INST(SDMA0, sdma_inst); + unsigned long ue_count = 0; + struct amdgpu_smuio_mcm_config_info mcm_info = { + .socket_id = adev->smuio.funcs->get_socket_id(adev), + .die_id = adev->sdma.instance[sdma_inst].aid_id, + }; /* sdma v4_4_2 doesn't support query ce counts */ amdgpu_ras_inst_query_ras_error_count(adev, @@ -2139,7 +2144,9 @@ static void sdma_v4_4_2_inst_query_ras_error_count(struct amdgpu_device *adev, ARRAY_SIZE(sdma_v4_4_2_ras_memory_list), sdma_dev_inst, AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE, - &err_data->ue_count); + &ue_count); + + amdgpu_ras_error_statistic_ue_count(err_data, &mcm_info, ue_count); } static void sdma_v4_4_2_query_ras_error_count(struct amdgpu_device *adev, |