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| author | Felix Kuehling <Felix.Kuehling@amd.com> | 2021-11-04 16:15:43 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2021-11-22 14:45:54 -0500 |
| commit | e39938117e781d0bd21ae45b6c15134f4a6958c5 (patch) | |
| tree | 9c860065f813e233b87b21b40d4254d4026334cf /drivers/gpu/drm/amd/amdgpu/nbio_v7_2.c | |
| parent | fdcb279d5b798d13b4365bdcf5548855f6c562a1 (diff) | |
| download | linux-e39938117e781d0bd21ae45b6c15134f4a6958c5.tar.gz linux-e39938117e781d0bd21ae45b6c15134f4a6958c5.tar.bz2 linux-e39938117e781d0bd21ae45b6c15134f4a6958c5.zip | |
drm/amdgpu: Fix MMIO HDP flush on SRIOV
Disable HDP register remapping on SRIOV and set rmmio_remap.reg_offset
to the fixed address of the VF register for hdp_v*_flush_hdp.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Tested-by: Bokun Zhang <bokun.zhang@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/nbio_v7_2.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/nbio_v7_2.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_2.c b/drivers/gpu/drm/amd/amdgpu/nbio_v7_2.c index 8f2a315e7c73..3444332ea110 100644 --- a/drivers/gpu/drm/amd/amdgpu/nbio_v7_2.c +++ b/drivers/gpu/drm/amd/amdgpu/nbio_v7_2.c @@ -371,6 +371,10 @@ static void nbio_v7_2_init_registers(struct amdgpu_device *adev) if (def != data) WREG32_PCIE_PORT(SOC15_REG_OFFSET(NBIO, 0, regPCIE_CONFIG_CNTL), data); } + + if (amdgpu_sriov_vf(adev)) + adev->rmmio_remap.reg_offset = SOC15_REG_OFFSET(NBIO, 0, + regBIF_BX_PF0_HDP_MEM_COHERENCY_FLUSH_CNTL) << 2; } const struct amdgpu_nbio_funcs nbio_v7_2_funcs = { |