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| author | Zhang, Jerry <Jerry.Zhang@amd.com> | 2017-03-29 16:08:32 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2017-04-06 13:27:17 -0400 |
| commit | 36b32a682bc32693e681cb984aac9c291a09c519 (patch) | |
| tree | 4c609971abad93d1658eb3333510aefa1a4ab5a7 /drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | |
| parent | d1a5b2502c8e0abb76be26145d45481fda41fb04 (diff) | |
| download | linux-36b32a682bc32693e681cb984aac9c291a09c519.tar.gz linux-36b32a682bc32693e681cb984aac9c291a09c519.tar.bz2 linux-36b32a682bc32693e681cb984aac9c291a09c519.zip | |
drm/amdgpu: fix vm size and block size for VMPT (v5)
Set reasonable defaults per family.
v2: set both of them in gmc
v3: move vm size and block size in vm manager
v4: squash in warning fix from Alex Xie
v5: squash in min() warning fix
Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c index 42b2f357a799..108a20e832cf 100644 --- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c @@ -853,7 +853,7 @@ static int gmc_v8_0_gart_enable(struct amdgpu_device *adev) tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, WRITE_PROTECTION_FAULT_ENABLE_DEFAULT, 1); tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, EXECUTE_PROTECTION_FAULT_ENABLE_DEFAULT, 1); tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, PAGE_TABLE_BLOCK_SIZE, - amdgpu_vm_block_size - 9); + adev->vm_manager.block_size - 9); WREG32(mmVM_CONTEXT1_CNTL, tmp); if (amdgpu_vm_fault_stop == AMDGPU_VM_FAULT_STOP_ALWAYS) gmc_v8_0_set_fault_enable_default(adev, false); @@ -1087,7 +1087,12 @@ static int gmc_v8_0_sw_init(void *handle) * Currently set to 4GB ((1 << 20) 4k pages). * Max GPUVM size for cayman and SI is 40 bits. */ - adev->vm_manager.max_pfn = amdgpu_vm_size << 18; + adev->vm_manager.vm_size = amdgpu_vm_size; + adev->vm_manager.block_size = amdgpu_vm_block_size; + adev->vm_manager.max_pfn = adev->vm_manager.vm_size << 18; + + DRM_INFO("vm size is %llu GB, block size is %d-bit\n", + adev->vm_manager.vm_size, adev->vm_manager.block_size); /* Set the internal MC address mask * This is the max address of the GPU's |