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authorLe Ma <le.ma@amd.com>2018-08-31 14:17:28 +0800
committerAlex Deucher <alexander.deucher@amd.com>2019-07-18 14:18:01 -0500
commit1daa2bfa17aa5ace20bb02509cd3d2c2c0afc642 (patch)
tree3a3bd16445d0b04f761b82b5a4ebf6cc3d8b3b9a /drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
parenta2d15ed733365ba2e0e3eb55a83c7a493eaaaa2c (diff)
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drm/amdgpu: add new member in amdgpu_device for vmhub counts per asic chip
It aims to replace AMDGPU_MAX_VMHUBS in for loop to initialize registers. Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
index f52823ffc7fd..0fd85cb15322 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
@@ -603,6 +603,7 @@ static int gmc_v10_0_sw_init(void *handle)
switch (adev->asic_type) {
case CHIP_NAVI10:
case CHIP_NAVI14:
+ adev->num_vmhubs = 2;
/*
* To fulfill 4-level page support,
* vm size is 256TB (48bit), maximum size of Navi10/Navi14,