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| author | Likun Gao <Likun.Gao@amd.com> | 2024-04-07 05:44:54 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2024-05-02 16:18:15 -0400 |
| commit | b9f5d0f9788968739fad3404dc0dad45716d67f7 (patch) | |
| tree | 67a7260c8906a1124f9ce37f15f886bb09b6ba42 /drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c | |
| parent | 598a3b753af1947adbc542d1ebcc1863877589b0 (diff) | |
| download | linux-b9f5d0f9788968739fad3404dc0dad45716d67f7.tar.gz linux-b9f5d0f9788968739fad3404dc0dad45716d67f7.tar.bz2 linux-b9f5d0f9788968739fad3404dc0dad45716d67f7.zip | |
drm/amdgpu: support cg state get for gfx v12
Support to get clockgating state for gfx v12.
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c | 38 |
1 files changed, 37 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c index e5bf2984d8cb..3c555f78d4da 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c @@ -3863,7 +3863,43 @@ static int gfx_v12_0_set_clockgating_state(void *handle, static void gfx_v12_0_get_clockgating_state(void *handle, u64 *flags) { - /* TODO */ + struct amdgpu_device *adev = (struct amdgpu_device *)handle; + int data; + + /* AMD_CG_SUPPORT_GFX_MGCG */ + data = RREG32_SOC15(GC, 0, regRLC_CGTT_MGCG_OVERRIDE); + if (!(data & RLC_CGTT_MGCG_OVERRIDE__GFXIP_MGCG_OVERRIDE_MASK)) + *flags |= AMD_CG_SUPPORT_GFX_MGCG; + + /* AMD_CG_SUPPORT_REPEATER_FGCG */ + if (!(data & RLC_CGTT_MGCG_OVERRIDE__GFXIP_REPEATER_FGCG_OVERRIDE_MASK)) + *flags |= AMD_CG_SUPPORT_REPEATER_FGCG; + + /* AMD_CG_SUPPORT_GFX_FGCG */ + if (!(data & RLC_CGTT_MGCG_OVERRIDE__GFXIP_FGCG_OVERRIDE_MASK)) + *flags |= AMD_CG_SUPPORT_GFX_FGCG; + + /* AMD_CG_SUPPORT_GFX_PERF_CLK */ + if (!(data & RLC_CGTT_MGCG_OVERRIDE__PERFMON_CLOCK_STATE_MASK)) + *flags |= AMD_CG_SUPPORT_GFX_PERF_CLK; + + /* AMD_CG_SUPPORT_GFX_CGCG */ + data = RREG32_SOC15(GC, 0, regRLC_CGCG_CGLS_CTRL); + if (data & RLC_CGCG_CGLS_CTRL__CGCG_EN_MASK) + *flags |= AMD_CG_SUPPORT_GFX_CGCG; + + /* AMD_CG_SUPPORT_GFX_CGLS */ + if (data & RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK) + *flags |= AMD_CG_SUPPORT_GFX_CGLS; + + /* AMD_CG_SUPPORT_GFX_3D_CGCG */ + data = RREG32_SOC15(GC, 0, regRLC_CGCG_CGLS_CTRL_3D); + if (data & RLC_CGCG_CGLS_CTRL_3D__CGCG_EN_MASK) + *flags |= AMD_CG_SUPPORT_GFX_3D_CGCG; + + /* AMD_CG_SUPPORT_GFX_3D_CGLS */ + if (data & RLC_CGCG_CGLS_CTRL_3D__CGLS_EN_MASK) + *flags |= AMD_CG_SUPPORT_GFX_3D_CGLS; } static u64 gfx_v12_0_ring_get_rptr_gfx(struct amdgpu_ring *ring) |