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| author | Leo Li <sunpeng.li@amd.com> | 2024-08-27 11:29:53 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2024-08-29 13:39:37 -0400 |
| commit | 28d43d0895896f84c038d906d244e0a95eb243ec (patch) | |
| tree | 61853286d25d33fa566e10e5ba714f0ad6d96ddc /drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c | |
| parent | 30e8f4c2bd532c44af0e0fad9c04e7d2970b91a6 (diff) | |
| download | linux-28d43d0895896f84c038d906d244e0a95eb243ec.tar.gz linux-28d43d0895896f84c038d906d244e0a95eb243ec.tar.bz2 linux-28d43d0895896f84c038d906d244e0a95eb243ec.zip | |
drm/amd/display: Determine IPS mode by ASIC and PMFW versions
[Why]
DCN IPS interoperates with other system idle power features, such as
Zstates.
On DCN35, there is a known issue where system Z8 + DCN IPS2 causes a
hard hang. We observe this on systems where the SBIOS allows Z8.
Though there is a SBIOS fix, there's no guarantee that users will get it
any time soon, or even install it. A workaround is needed to prevent
this from rearing its head in the wild.
[How]
For DCN35, check the pmfw version to determine whether the SBIOS has the
fix. If not, set IPS1+RCG as the deepest possible state in all cases
except for s0ix and display off (DPMS). Otherwise, enable all IPS
Signed-off-by: Leo Li <sunpeng.li@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c')
0 files changed, 0 insertions, 0 deletions