diff options
| author | Gabriel Fernandez <gabriel.fernandez@foss.st.com> | 2022-05-16 09:05:50 +0200 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2022-05-20 21:07:48 -0700 |
| commit | 95f5e0a4c5fc654c9fdfe044e4c692bfead01352 (patch) | |
| tree | c4dc4730e279653beaf59120a7f2c4bc89c7e4e8 /drivers/clk/stm32/clk-stm32-core.h | |
| parent | f95cea8308de5ef4075ae4f1f8a72ec275b0d5b5 (diff) | |
| download | linux-95f5e0a4c5fc654c9fdfe044e4c692bfead01352.tar.gz linux-95f5e0a4c5fc654c9fdfe044e4c692bfead01352.tar.bz2 linux-95f5e0a4c5fc654c9fdfe044e4c692bfead01352.zip | |
clk: stm32mp13: add stm32_gate management
Just to introduce management of a stm32 gate clock.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Link: https://lore.kernel.org/r/20220516070600.7692-5-gabriel.fernandez@foss.st.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/stm32/clk-stm32-core.h')
| -rw-r--r-- | drivers/clk/stm32/clk-stm32-core.h | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/drivers/clk/stm32/clk-stm32-core.h b/drivers/clk/stm32/clk-stm32-core.h index 8563e6e1c91a..f958ef610f72 100644 --- a/drivers/clk/stm32/clk-stm32-core.h +++ b/drivers/clk/stm32/clk-stm32-core.h @@ -94,8 +94,19 @@ struct clk_stm32_mux { #define to_clk_stm32_mux(_hw) container_of(_hw, struct clk_stm32_mux, hw) +struct clk_stm32_gate { + u16 gate_id; + struct clk_hw hw; + void __iomem *base; + struct clk_stm32_clock_data *clock_data; + spinlock_t *lock; /* spin lock */ +}; + +#define to_clk_stm32_gate(_hw) container_of(_hw, struct clk_stm32_gate, hw) + /* Clock operators */ extern const struct clk_ops clk_stm32_mux_ops; +extern const struct clk_ops clk_stm32_gate_ops; /* Clock registering */ struct clk_hw *clk_stm32_mux_register(struct device *dev, @@ -104,6 +115,12 @@ struct clk_hw *clk_stm32_mux_register(struct device *dev, spinlock_t *lock, const struct clock_config *cfg); +struct clk_hw *clk_stm32_gate_register(struct device *dev, + const struct stm32_rcc_match_data *data, + void __iomem *base, + spinlock_t *lock, + const struct clock_config *cfg); + #define STM32_CLOCK_CFG(_binding, _clk, _struct, _register)\ {\ .id = (_binding),\ @@ -114,3 +131,7 @@ struct clk_hw *clk_stm32_mux_register(struct device *dev, #define STM32_MUX_CFG(_binding, _clk)\ STM32_CLOCK_CFG(_binding, &(_clk), struct clk_stm32_mux *,\ &clk_stm32_mux_register) + +#define STM32_GATE_CFG(_binding, _clk)\ + STM32_CLOCK_CFG(_binding, &(_clk), struct clk_stm32_gate *,\ + &clk_stm32_gate_register) |