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| author | Adrian Hunter <adrian.hunter@intel.com> | 2022-08-15 10:33:21 +0300 |
|---|---|---|
| committer | Ulf Hansson <ulf.hansson@linaro.org> | 2022-08-22 12:58:28 +0200 |
| commit | 63f1560930e4e1c4f6279b8ae715c9841fe1a6d3 (patch) | |
| tree | 18088e0fecec806d1d13deb0424d642826f3da78 /drivers/clk/clk-gpio.c | |
| parent | 15c56208c79c340686869c31595c209d1431c5e8 (diff) | |
| download | linux-63f1560930e4e1c4f6279b8ae715c9841fe1a6d3.tar.gz linux-63f1560930e4e1c4f6279b8ae715c9841fe1a6d3.tar.bz2 linux-63f1560930e4e1c4f6279b8ae715c9841fe1a6d3.zip | |
mmc: core: Fix inconsistent sd3_bus_mode at UHS-I SD voltage switch failure
If re-initialization results is a different signal voltage, because the
voltage switch failed previously, but not this time (or vice versa), then
sd3_bus_mode will be inconsistent with the card because the SD_SWITCH
command is done only upon first initialization.
Fix by always reading SD_SWITCH information during re-initialization, which
also means it does not need to be re-read later for the 1.8V fixup
workaround.
Note, brief testing showed SD_SWITCH took about 1.8ms to 2ms which added
about 1% to 1.5% to the re-initialization time, so it's not particularly
significant.
Reported-by: Seunghui Lee <sh043.lee@samsung.com>
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Reviewed-by: Seunghui Lee <sh043.lee@samsung.com>
Tested-by: Seunghui Lee <sh043.lee@samsung.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20220815073321.63382-3-adrian.hunter@intel.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/clk/clk-gpio.c')
0 files changed, 0 insertions, 0 deletions