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| author | Wachowski, Karol <karol.wachowski@intel.com> | 2024-01-26 13:27:58 +0100 |
|---|---|---|
| committer | Jacek Lawrynowicz <jacek.lawrynowicz@linux.intel.com> | 2024-02-06 13:36:32 +0100 |
| commit | c9da9a1f17bf4fa96b115950fd389c917b583c1c (patch) | |
| tree | cfd4307e499c7c2350d686a080ce9ceb4328922a /drivers/accel/ivpu/ivpu_hw_37xx.c | |
| parent | 34e659f34a7559ecfd9c1f5b24d4c291f3f54711 (diff) | |
| download | linux-c9da9a1f17bf4fa96b115950fd389c917b583c1c.tar.gz linux-c9da9a1f17bf4fa96b115950fd389c917b583c1c.tar.bz2 linux-c9da9a1f17bf4fa96b115950fd389c917b583c1c.zip | |
accel/ivpu: Force snooping for MMU writes
Set AW_SNOOP_OVERRIDE bit in VPU_37/40XX_HOST_IF_TCU_PTW_OVERRIDES
to force snooping for MMU write accesses (setting event queue events).
MMU event queue buffer is the only buffer written by MMU and
mapped as write-back which break cache coherency. Force write
transactions to be snooped solving the problem.
Signed-off-by: Wachowski, Karol <karol.wachowski@intel.com>
Signed-off-by: Jacek Lawrynowicz <jacek.lawrynowicz@linux.intel.com>
Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240126122804.2169129-2-jacek.lawrynowicz@linux.intel.com
Diffstat (limited to 'drivers/accel/ivpu/ivpu_hw_37xx.c')
| -rw-r--r-- | drivers/accel/ivpu/ivpu_hw_37xx.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/accel/ivpu/ivpu_hw_37xx.c b/drivers/accel/ivpu/ivpu_hw_37xx.c index f15a93d83057..77accd029c4a 100644 --- a/drivers/accel/ivpu/ivpu_hw_37xx.c +++ b/drivers/accel/ivpu/ivpu_hw_37xx.c @@ -525,7 +525,7 @@ static void ivpu_boot_no_snoop_enable(struct ivpu_device *vdev) u32 val = REGV_RD32(VPU_37XX_HOST_IF_TCU_PTW_OVERRIDES); val = REG_SET_FLD(VPU_37XX_HOST_IF_TCU_PTW_OVERRIDES, NOSNOOP_OVERRIDE_EN, val); - val = REG_SET_FLD(VPU_37XX_HOST_IF_TCU_PTW_OVERRIDES, AW_NOSNOOP_OVERRIDE, val); + val = REG_CLR_FLD(VPU_37XX_HOST_IF_TCU_PTW_OVERRIDES, AW_NOSNOOP_OVERRIDE, val); val = REG_SET_FLD(VPU_37XX_HOST_IF_TCU_PTW_OVERRIDES, AR_NOSNOOP_OVERRIDE, val); REGV_WR32(VPU_37XX_HOST_IF_TCU_PTW_OVERRIDES, val); |