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authorBenjamin Berg <benjamin.berg@intel.com>2024-09-19 14:45:11 +0200
committerJohannes Berg <johannes.berg@intel.com>2024-10-10 13:37:22 +0200
commit41ab5fe7471ff38d2909d1c93b88197a89c6a00f (patch)
treeea76a3b75fd7d8d2b7a4be194e74081113d0b595 /arch/x86/um
parente167cc7a95fe01e228e403ac90090f8613e7d8bc (diff)
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um: Switch to 4 level page tables on 64 bit
The larger memory space is useful to support more applications inside UML. One example for this is ASAN instrumentation of userspace applications which requires addresses that would otherwise not be available. Signed-off-by: Benjamin Berg <benjamin.berg@intel.com> Link: https://patch.msgid.link/20240919124511.282088-11-benjamin@sipsolutions.net Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Diffstat (limited to 'arch/x86/um')
-rw-r--r--arch/x86/um/Kconfig3
1 files changed, 0 insertions, 3 deletions
diff --git a/arch/x86/um/Kconfig b/arch/x86/um/Kconfig
index 05cb7bb291e0..986045d5e638 100644
--- a/arch/x86/um/Kconfig
+++ b/arch/x86/um/Kconfig
@@ -29,9 +29,6 @@ config X86_64
def_bool 64BIT
select MODULES_USE_ELF_RELA
-config 3_LEVEL_PGTABLES
- def_bool 64BIT
-
config ARCH_HAS_SC_SIGNALS
def_bool !64BIT