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authorJason Gunthorpe <jgg@nvidia.com>2022-12-09 15:52:17 -0400
committerJason Gunthorpe <jgg@nvidia.com>2022-12-09 15:52:17 -0400
commitd69e8c63fcbbf695ff7ff2c6d26efead23cfbb3a (patch)
tree4d714ecd331233069ab718989bb017dfd934e129 /arch/x86/kernel/cpu/amd.c
parent6cfe7bd0dfd33033683639039b5608d6534c19eb (diff)
parent76dcd734eca23168cb008912c0f69ff408905235 (diff)
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Merge tag 'v6.1-rc8' into rdma.git for-next
For dependencies in following patches Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
Diffstat (limited to 'arch/x86/kernel/cpu/amd.c')
-rw-r--r--arch/x86/kernel/cpu/amd.c6
1 files changed, 2 insertions, 4 deletions
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 860b60273df3..c75d75b9f11a 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -770,8 +770,6 @@ static void init_amd_gh(struct cpuinfo_x86 *c)
set_cpu_bug(c, X86_BUG_AMD_TLB_MMATCH);
}
-#define MSR_AMD64_DE_CFG 0xC0011029
-
static void init_amd_ln(struct cpuinfo_x86 *c)
{
/*
@@ -965,8 +963,8 @@ static void init_amd(struct cpuinfo_x86 *c)
* msr_set_bit() uses the safe accessors, too, even if the MSR
* is not present.
*/
- msr_set_bit(MSR_F10H_DECFG,
- MSR_F10H_DECFG_LFENCE_SERIALIZE_BIT);
+ msr_set_bit(MSR_AMD64_DE_CFG,
+ MSR_AMD64_DE_CFG_LFENCE_SERIALIZE_BIT);
/* A serializing LFENCE stops RDTSC speculation */
set_cpu_cap(c, X86_FEATURE_LFENCE_RDTSC);