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authorYazen Ghannam <yazen.ghannam@amd.com>2024-10-22 19:36:31 +0000
committerBorislav Petkov (AMD) <bp@alien8.de>2024-10-31 10:53:04 +0100
commit612c2addff367ee461dc99ffca2bc786f105d2ec (patch)
treeadbf197b0274f78074b8eae4bae52ee3eedb962a /arch/x86/include/asm/mce.h
parente9876dafa28ebbeead11b6376b1402832d895c85 (diff)
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EDAC/mce_amd: Add support for FRU text in MCA
A new "FRU Text in MCA" feature is defined where the Field Replaceable Unit (FRU) Text for a device is represented by a string in the new MCA_SYND1 and MCA_SYND2 registers. This feature is supported per MCA bank, and it is advertised by the McaFruTextInMca bit (MCA_CONFIG[9]). The FRU Text is populated dynamically for each individual error state (MCA_STATUS, MCA_ADDR, et al.). Handle the case where an MCA bank covers multiple devices, for example, a Unified Memory Controller (UMC) bank that manages two DIMMs. [ Yazen: Add Avadhut as co-developer for wrapper changes. ] [ bp: Do not expose MCA_CONFIG to userspace yet. ] Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com> Co-developed-by: Avadhut Naik <avadhut.naik@amd.com> Signed-off-by: Avadhut Naik <avadhut.naik@amd.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://lore.kernel.org/r/20241022194158.110073-6-avadhut.naik@amd.com
Diffstat (limited to 'arch/x86/include/asm/mce.h')
-rw-r--r--arch/x86/include/asm/mce.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h
index 4d936ee20e24..4543cf2eb5e8 100644
--- a/arch/x86/include/asm/mce.h
+++ b/arch/x86/include/asm/mce.h
@@ -61,6 +61,7 @@
* - TCC bit is present in MCx_STATUS.
*/
#define MCI_CONFIG_MCAX 0x1
+#define MCI_CONFIG_FRUTEXT BIT_ULL(9)
#define MCI_IPID_MCATYPE 0xFFFF0000
#define MCI_IPID_HWID 0xFFF