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authorAl Viro <viro@zeniv.linux.org.uk>2020-07-16 14:05:36 -0400
committerAl Viro <viro@zeniv.linux.org.uk>2021-01-03 20:05:18 -0500
commitb4edf06c8aaae30ef926bd6853df6e59a7579ee9 (patch)
tree734b80c130634179fe3f3cfaf413cddc7d016817 /arch/sparc/include/asm/extable.h
parentc4da8e0dc6f7cec80f32af080cadf47c1753a2ab (diff)
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sparc32: switch to generic extables
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Diffstat (limited to 'arch/sparc/include/asm/extable.h')
-rw-r--r--arch/sparc/include/asm/extable.h21
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/sparc/include/asm/extable.h b/arch/sparc/include/asm/extable.h
new file mode 100644
index 000000000000..554a9dc376fc
--- /dev/null
+++ b/arch/sparc/include/asm/extable.h
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __ASM_EXTABLE_H
+#define __ASM_EXTABLE_H
+/*
+ * The exception table consists of pairs of addresses: the first is the
+ * address of an instruction that is allowed to fault, and the second is
+ * the address at which the program should continue. No registers are
+ * modified, so it is entirely up to the continuation code to figure out
+ * what to do.
+ *
+ * All the routines below use bits of fixup code that are out of line
+ * with the main instruction path. This means when everything is well,
+ * we don't even have to jump over them. Further, they do not intrude
+ * on our cache or tlb entries.
+ */
+
+struct exception_table_entry {
+ unsigned int insn, fixup;
+};
+
+#endif