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authorParthiban Veerasooran <Parthiban.Veerasooran@microchip.com>2024-09-09 13:55:11 +0530
committerJakub Kicinski <kuba@kernel.org>2024-09-11 20:53:45 -0700
commit2c6ce535445362dc58a58c9813e58bb3da28eab7 (patch)
tree68d4c6e7e8cf562eda825d17fc57537737454fb8 /arch/riscv/include/asm/processor.h
parentd70a0d8f2f2d1b9bb6e3e9dfed25ae3ca3303770 (diff)
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net: ethernet: oa_tc6: implement mac-phy interrupt
The MAC-PHY interrupt is asserted when the following conditions are met. Receive chunks available - This interrupt is asserted when the previous data footer had no receive data chunks available and once the receive data chunks become available for reading. On reception of the first data header this interrupt will be deasserted. Transmit chunk credits available - This interrupt is asserted when the previous data footer indicated no transmit credits available and once the transmit credits become available for transmitting transmit data chunks. On reception of the first data header this interrupt will be deasserted. Extended status event - This interrupt is asserted when the previous data footer indicated no extended status and once the extended event become available. In this case the host should read status #0 register to know the corresponding error/event. On reception of the first data header this interrupt will be deasserted. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Parthiban Veerasooran <Parthiban.Veerasooran@microchip.com> Link: https://patch.msgid.link/20240909082514.262942-12-Parthiban.Veerasooran@microchip.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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