diff options
author | Parthiban Veerasooran <Parthiban.Veerasooran@microchip.com> | 2024-09-09 13:55:11 +0530 |
---|---|---|
committer | Jakub Kicinski <kuba@kernel.org> | 2024-09-11 20:53:45 -0700 |
commit | 2c6ce535445362dc58a58c9813e58bb3da28eab7 (patch) | |
tree | 68d4c6e7e8cf562eda825d17fc57537737454fb8 /arch/riscv/include/asm/processor.h | |
parent | d70a0d8f2f2d1b9bb6e3e9dfed25ae3ca3303770 (diff) | |
download | linux-2c6ce535445362dc58a58c9813e58bb3da28eab7.tar.gz linux-2c6ce535445362dc58a58c9813e58bb3da28eab7.tar.bz2 linux-2c6ce535445362dc58a58c9813e58bb3da28eab7.zip |
net: ethernet: oa_tc6: implement mac-phy interrupt
The MAC-PHY interrupt is asserted when the following conditions are met.
Receive chunks available - This interrupt is asserted when the previous
data footer had no receive data chunks available and once the receive
data chunks become available for reading. On reception of the first data
header this interrupt will be deasserted.
Transmit chunk credits available - This interrupt is asserted when the
previous data footer indicated no transmit credits available and once the
transmit credits become available for transmitting transmit data chunks.
On reception of the first data header this interrupt will be deasserted.
Extended status event - This interrupt is asserted when the previous data
footer indicated no extended status and once the extended event become
available. In this case the host should read status #0 register to know
the corresponding error/event. On reception of the first data header this
interrupt will be deasserted.
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Parthiban Veerasooran <Parthiban.Veerasooran@microchip.com>
Link: https://patch.msgid.link/20240909082514.262942-12-Parthiban.Veerasooran@microchip.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'arch/riscv/include/asm/processor.h')
0 files changed, 0 insertions, 0 deletions