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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2019-09-17 13:46:44 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2019-09-17 13:46:44 -0700 |
| commit | 1e24aaabdee9e07f19b09bd305ffc069b0b07371 (patch) | |
| tree | 316ad0f78053bbc39474a5ed42d7e023702e2a97 /arch/openrisc/boot | |
| parent | 16da0961d3d5521f6541a422c5485ea4ddfe860b (diff) | |
| parent | f3b17320db25b4cdd50f0396b096644455357dac (diff) | |
| download | linux-1e24aaabdee9e07f19b09bd305ffc069b0b07371.tar.gz linux-1e24aaabdee9e07f19b09bd305ffc069b0b07371.tar.bz2 linux-1e24aaabdee9e07f19b09bd305ffc069b0b07371.zip | |
Merge tag 'for-linus' of git://github.com/openrisc/linux
Pull OpenRISC updates from Stafford Horne:
"Few small things for 5.4:
- Fixup ethoc ethernet device tree descriptors which were previously
broken, now ethernet works on FPGAs running OpenRISC!
- Switch ioremap to use uncached semantics - from Christoph Hellwig"
* tag 'for-linus' of git://github.com/openrisc/linux:
openrisc: map as uncached in ioremap
or1k: dts: Add ethoc device to SMP devicetree
or1k: dts: Fix ethoc network configuration in or1ksim devicetree
Diffstat (limited to 'arch/openrisc/boot')
| -rw-r--r-- | arch/openrisc/boot/dts/or1ksim.dts | 5 | ||||
| -rw-r--r-- | arch/openrisc/boot/dts/simple_smp.dts | 6 |
2 files changed, 9 insertions, 2 deletions
diff --git a/arch/openrisc/boot/dts/or1ksim.dts b/arch/openrisc/boot/dts/or1ksim.dts index d8aa8309c9d3..c0cb74e52f95 100644 --- a/arch/openrisc/boot/dts/or1ksim.dts +++ b/arch/openrisc/boot/dts/or1ksim.dts @@ -49,8 +49,9 @@ }; enet0: ethoc@92000000 { - compatible = "opencores,ethmac-rtlsvn338"; - reg = <0x92000000 0x100>; + compatible = "opencores,ethoc"; + reg = <0x92000000 0x800>; interrupts = <4>; + big-endian; }; }; diff --git a/arch/openrisc/boot/dts/simple_smp.dts b/arch/openrisc/boot/dts/simple_smp.dts index defbb92714ec..71af0e117bfe 100644 --- a/arch/openrisc/boot/dts/simple_smp.dts +++ b/arch/openrisc/boot/dts/simple_smp.dts @@ -60,4 +60,10 @@ clock-frequency = <20000000>; }; + enet0: ethoc@92000000 { + compatible = "opencores,ethoc"; + reg = <0x92000000 0x800>; + interrupts = <4>; + big-endian; + }; }; |