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| author | Greentime Hu <greentime@andestech.com> | 2018-04-30 11:21:18 +0800 |
|---|---|---|
| committer | Greentime Hu <greentime@andestech.com> | 2018-05-23 13:26:21 +0800 |
| commit | 3ff2228dcea4e5c9b517375bd3aa9e3a1a3f29a0 (patch) | |
| tree | e1bed98943e467e4b5a887b37cc0179ed1b63188 /arch/nds32/include/asm/cache.h | |
| parent | b3b112bb06eb26ce44af63d599aaf5fe54de0699 (diff) | |
| download | linux-3ff2228dcea4e5c9b517375bd3aa9e3a1a3f29a0.tar.gz linux-3ff2228dcea4e5c9b517375bd3aa9e3a1a3f29a0.tar.bz2 linux-3ff2228dcea4e5c9b517375bd3aa9e3a1a3f29a0.zip | |
nds32: Fix the virtual address may map too much range by tlbop issue.
We use tlbop to map virtual address in the first beginning, however it
may map too much if DRAM size is not that big. We have to invalidate the
mapping when the page table is created.
Signed-off-by: Greentime Hu <greentime@andestech.com>
Diffstat (limited to 'arch/nds32/include/asm/cache.h')
0 files changed, 0 insertions, 0 deletions