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| author | Yu Chien Peter Lin <peterlin@andestech.com> | 2024-02-22 16:39:38 +0800 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2024-02-23 09:57:42 +0100 |
| commit | 96303bcb401c21dc1426d8d9bb1fc74aae5c02a9 (patch) | |
| tree | 612e1ece0c6ba8f0017cefc563069689fd7d7fbd /arch/mips/kernel/machine_kexec.c | |
| parent | 6613476e225e090cc9aad49be7fa504e290dd33d (diff) | |
| download | linux-96303bcb401c21dc1426d8d9bb1fc74aae5c02a9.tar.gz linux-96303bcb401c21dc1426d8d9bb1fc74aae5c02a9.tar.bz2 linux-96303bcb401c21dc1426d8d9bb1fc74aae5c02a9.zip | |
irqchip/riscv-intc: Allow large non-standard interrupt number
Currently, the implementation of the RISC-V INTC driver uses the
interrupt cause as the hardware interrupt number, with a maximum of
64 interrupts. However, the platform can expand the interrupt number
further for custom local interrupts.
To fully utilize the available local interrupt sources, switch
to using irq_domain_create_tree() that creates the radix tree
map, add global variables (riscv_intc_nr_irqs, riscv_intc_custom_base
and riscv_intc_custom_nr_irqs) to determine the valid range of local
interrupt number (hwirq).
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Randolph <randolph@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20240222083946.3977135-3-peterlin@andestech.com
Diffstat (limited to 'arch/mips/kernel/machine_kexec.c')
0 files changed, 0 insertions, 0 deletions