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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-01-07 12:00:25 -0800 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-01-07 12:00:25 -0800 |
| commit | 5bb47b9ff3d16d40f8d45380b373497a545fa280 (patch) | |
| tree | e13dd34395473342dc75eff5cbaf5b1ea753631c /arch/blackfin/include/asm/cplb.h | |
| parent | 2f2408a88cf8fa43febfd7fb5783e61b2937b0f9 (diff) | |
| parent | 06af15e086e39a5a2a2413973a64af8e10122f28 (diff) | |
| download | linux-5bb47b9ff3d16d40f8d45380b373497a545fa280.tar.gz linux-5bb47b9ff3d16d40f8d45380b373497a545fa280.tar.bz2 linux-5bb47b9ff3d16d40f8d45380b373497a545fa280.zip | |
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6: (171 commits)
Blackfin arch: fix bug - BF527 0.2 silicon has different CPUID (DSPID) value
Blackfin arch: Enlarge flash partition for kenel for bf533/bf537 boards
Blackfin arch: fix bug: kernel crash when enable SDIO host driver
Blackfin arch: Print FP at level KERN_NOTICE
Blackfin arch: drop ad73311 test code
Blackfin arch: update board default configs
Blackfin arch: Set PB4 as the default irq for bf548 board v1.4+.
Blackfin arch: fix typo in early printk bit size processing
Blackfin arch: enable reprogram cclk and sclk for bf518f-ezbrd
Blackfin arch: add SDIO host driver platform data
Blackfin arch: fix bug - kernel stops at initial console
Blackfin arch: fix bug - kernel crash after config IP for ethernet port
Blackfin arch: add sdh support for bf518f-ezbrd
Blackfin arch: fix bug - kernel detects BF532 incorrectly
Blackfin arch: add () to avoid warnings from gcc
Blackfin arch: change HWTRACE Kconfig and set it on default
Blackfin arch: Clean oprofile build path for blackfin
Blackfin arch: remove hardware PM code, oprofile not use it
Blackfin arch: rewrite get_sclk()/get_vco()
Blackfin arch: cleanup and unify the ins functions
...
Diffstat (limited to 'arch/blackfin/include/asm/cplb.h')
| -rw-r--r-- | arch/blackfin/include/asm/cplb.h | 25 |
1 files changed, 16 insertions, 9 deletions
diff --git a/arch/blackfin/include/asm/cplb.h b/arch/blackfin/include/asm/cplb.h index 9e8b4035fcec..ad566ff9ad16 100644 --- a/arch/blackfin/include/asm/cplb.h +++ b/arch/blackfin/include/asm/cplb.h @@ -30,7 +30,6 @@ #ifndef _CPLB_H #define _CPLB_H -#include <asm/blackfin.h> #include <mach/anomaly.h> #define SDRAM_IGENERIC (CPLB_L1_CHBL | CPLB_USER_RD | CPLB_VALID | CPLB_PORTPRIO) @@ -55,13 +54,24 @@ #endif #define L1_DMEMORY (CPLB_LOCK | CPLB_COMMON) + +#ifdef CONFIG_SMP +#define L2_ATTR (INITIAL_T | I_CPLB | D_CPLB) +#define L2_IMEMORY (CPLB_COMMON | CPLB_LOCK) +#define L2_DMEMORY (CPLB_COMMON | CPLB_LOCK) + +#else #ifdef CONFIG_BFIN_L2_CACHEABLE #define L2_IMEMORY (SDRAM_IGENERIC) #define L2_DMEMORY (SDRAM_DGENERIC) #else #define L2_IMEMORY (CPLB_COMMON) #define L2_DMEMORY (CPLB_COMMON) -#endif +#endif /* CONFIG_BFIN_L2_CACHEABLE */ + +#define L2_ATTR (INITIAL_T | SWITCH_T | I_CPLB | D_CPLB) +#endif /* CONFIG_SMP */ + #define SDRAM_DNON_CHBL (CPLB_COMMON) #define SDRAM_EBIU (CPLB_COMMON) #define SDRAM_OOPS (CPLB_VALID | ANOMALY_05000158_WORKAROUND | CPLB_LOCK | CPLB_DIRTY) @@ -71,14 +81,7 @@ #define SIZE_1M 0x00100000 /* 1M */ #define SIZE_4M 0x00400000 /* 4M */ -#ifdef CONFIG_MPU #define MAX_CPLBS 16 -#else -#define MAX_CPLBS (16 * 2) -#endif - -#define ASYNC_MEMORY_CPLB_COVERAGE ((ASYNC_BANK0_SIZE + ASYNC_BANK1_SIZE + \ - ASYNC_BANK2_SIZE + ASYNC_BANK3_SIZE) / SIZE_4M) #define CPLB_ENABLE_ICACHE_P 0 #define CPLB_ENABLE_DCACHE_P 1 @@ -113,4 +116,8 @@ #define CPLB_INOCACHE CPLB_USER_RD | CPLB_VALID #define CPLB_IDOCACHE CPLB_INOCACHE | CPLB_L1_CHBL +#define FAULT_RW (1 << 16) +#define FAULT_USERSUPV (1 << 17) +#define FAULT_CPLBBITS 0x0000ffff + #endif /* _CPLB_H */ |