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authorOlof Johansson <olof@lixom.net>2013-02-11 19:37:51 -0800
committerOlof Johansson <olof@lixom.net>2013-02-11 19:37:51 -0800
commit1c75c4210009d5cceced76af316c51f9e56ce630 (patch)
treecfa3600b25fe8ca385ddc6a2cd230da876312dcb /arch/arm/mach-socfpga/core.h
parent877cd953167bc50765719ca047a3ac2c4fdd7aaf (diff)
parentd6dd735f4bda19bfe07d96d9025c94c4619d4596 (diff)
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Merge branch 'socfpga/hw' into next/soc
From Dinh Nguyen, this is a series of patches introducing support for socfpga hardware (Altera Cyclone5). It also includes a cleanup that moves some of the ARMv7 cache maintenance functions to a common location, since three other platforms aready implemented it separately. * socfpga/hw: arm: socfpga: Add SMP support for actual socfpga harware arm: Add v7_invalidate_l1 to cache-v7.S arm: socfpga: Add entries to enable make dtbs socfpga arm: socfpga: Add new device tree source for actual socfpga HW Trivial conflict in arch/arm/mach-tegra/headsmp.S. Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mach-socfpga/core.h')
-rw-r--r--arch/arm/mach-socfpga/core.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm/mach-socfpga/core.h b/arch/arm/mach-socfpga/core.h
index 9941caa94931..315edff610f2 100644
--- a/arch/arm/mach-socfpga/core.h
+++ b/arch/arm/mach-socfpga/core.h
@@ -20,7 +20,7 @@
#ifndef __MACH_CORE_H
#define __MACH_CORE_H
-extern void secondary_startup(void);
+extern void socfpga_secondary_startup(void);
extern void __iomem *socfpga_scu_base_addr;
extern void socfpga_init_clocks(void);
@@ -29,6 +29,8 @@ extern void socfpga_sysmgr_init(void);
extern struct smp_operations socfpga_smp_ops;
extern char secondary_trampoline, secondary_trampoline_end;
+extern unsigned long cpu1start_addr;
+
#define SOCFPGA_SCU_VIRT_BASE 0xfffec000
#endif