Merge tag 'arm-soc-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC updates from Arnd Bergmann:
 "The main changes this time are for the organization of the Kconfig
  files, introducing per-vendor top-level options on arm64 to match
  those on arm32, and making the platform selection on arm32 more
  uniform, in particular for the remaining StrongARM platforms that
  still have a couple of special cases compared to the more recent ones.

  I also did a cleanup of the old Footbridge platform, which was the
  last holdout for the phys_to_dma()/dma_to_phys() interface that is now
  completely gone from arm32, completing work started by Christoph
  Hellwig"

* tag 'arm-soc-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (21 commits)
  ARM: aspeed: Kconfig: Fix indentation
  ARM: Drop CMDLINE_* dependency on ATAGS
  ARM: Drop CMDLINE_FORCE dependency on !ARCH_MULTIPLATFORM
  ARM: s3c: remove orphan declarations from arch/arm/mach-s3c/devs.h
  pxa: Drop if with an always false condition
  ARM: orion: fix include path
  ARM: shmobile: Drop selecting SOC_BUS
  arm64: renesas: Drop selecting SOC_BUS
  ARM: disallow PCI with MMU=n again
  ARM: footbridge: remove custom DMA address handling
  MAINTAINERS: Add BCM4908 maintainer to BCMBCA entry
  ARM: footbridge: move isa-dma support into footbridge
  ARM: footbridge: remove leftover from personal-server
  ARM: footbridge: remove addin mode
  arm64: Kconfig.platforms: Group NXP platforms together
  arm64: Kconfig.platforms: Re-organized Broadcom menu
  ARM: make ARCH_MULTIPLATFORM user-visible
  ARM: fix XIP_KERNEL dependencies
  ARM: Kconfig: clean up platform selection
  ARM: simplify machdirs/platdirs handling
  ...

1 files changed, 7 insertions, 13 deletions

diff --git a/arch/arm/include/asm/hardware/dec21285.h b/arch/arm/include/asm/hardware/dec21285.h
index 3f18a56a025d..894f2a635cbb 100644
--- a/arch/arm/include/asm/hardware/dec21285.h
+++ b/arch/arm/include/asm/hardware/dec21285.h
@@ -22,6 +22,13 @@
 #define DC21285_IO(x)		(x)
 #endif
 
+/*
+ * The footbridge is programmed to expose the system RAM at 0xe0000000.
+ * The requirement is that the RAM isn't placed at bus address 0, which
+ * would clash with VGA cards.
+ */
+#define BUS_OFFSET 0xe0000000
+
 #define CSR_PCICMD		DC21285_IO(0x0004)
 #define CSR_CLASSREV		DC21285_IO(0x0008)
 #define CSR_PCICACHELINESIZE	DC21285_IO(0x000c)
@@ -81,19 +88,6 @@
 #define SA110_CNTL_XCSDIR(x)		((x)<<28)
 #define SA110_CNTL_PCICFN		(1 << 31)
 
-/*
- * footbridge_cfn_mode() is used when we want
- * to check whether we are the central function
- */
-#define __footbridge_cfn_mode() (*CSR_SA110_CNTL & SA110_CNTL_PCICFN)
-#if defined(CONFIG_FOOTBRIDGE_HOST) && defined(CONFIG_FOOTBRIDGE_ADDIN)
-#define footbridge_cfn_mode() __footbridge_cfn_mode()
-#elif defined(CONFIG_FOOTBRIDGE_HOST)
-#define footbridge_cfn_mode() (1)
-#else
-#define footbridge_cfn_mode() (0)
-#endif
-
 #define CSR_PCIADDR_EXTN	DC21285_IO(0x0140)
 #define CSR_PREFETCHMEMRANGE	DC21285_IO(0x0144)
 #define CSR_XBUS_CYCLE		DC21285_IO(0x0148)