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author | Arnd Bergmann <arnd@arndb.de> | 2022-12-07 22:06:03 +0100 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2022-12-07 22:06:03 +0100 |
commit | da060ab86eb0de7954dafa34aefa9cc58cc4e76c (patch) | |
tree | ed3894c10a901ba917a0b850fe424748840b14c8 /arch/arm/boot/dts/qcom-msm8226.dtsi | |
parent | c24ba5964f040163bb1e9f248a7f7e2171f2c9e1 (diff) | |
parent | 812e13ddb56aa5c4534c96b522d2e39e094df677 (diff) | |
download | linux-da060ab86eb0de7954dafa34aefa9cc58cc4e76c.tar.gz linux-da060ab86eb0de7954dafa34aefa9cc58cc4e76c.tar.bz2 linux-da060ab86eb0de7954dafa34aefa9cc58cc4e76c.zip |
Merge tag 'qcom-dts-for-6.2-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt
More Qualcomm DTS updates for 6.2
This introduces support for the OnePlus One, on MSM8974Pro, and properly
marks other Pro devices as compatible thereof. Also on MSM8974, the
description of USB devices and their PHYs are cleaned up.
On the binding side compatibles for recently added ARM and ARM64 boards
are added.
* tag 'qcom-dts-for-6.2-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (102 commits)
dt-bindings: arm: qcom: Add zombie
ARM: dts: qcom: msm8974: Add OnePlus One
dt-bindings: arm: qcom: Document oneplus,bacon device
ARM: dts: qcom: msm8974: clean up USB nodes
arm: dts: qcom: use qcom,msm8974pro for pro devices
dt-bindings: arm: qcom: split MSM8974 Pro and MSM8974
ARM: dts: qcom: align LED node names with dtschema
dt-bindings: arm: qcom: Document additional sa8540p device
dt-bindings: arm: qcom: Add Xperia 5 IV (PDX224)
dt-bindings: arm: qcom: Document msm8956 and msm8976 SoC and devices
dt-bindings: arm: add xiaomi,sagit board based on msm8998 chip
dt-bindings: arm: qcom: add sdm670 and pixel 3a compatible
dt-bindings: arm: cpus: add qcom kryo 360 compatible
ARM: dts: qcom-msm8960-cdp: align TLMM pin configuration with DT schema
ARM: dts: qcom-msm8960: use define for interrupt constants
dt-bindings: arm: qcom: Document SM6375 & Xperia 10 IV
ARM: dts: qcom-apq8060: align TLMM pin configuration with DT schema
ARM: dts: qcom: msm8226: Add MMCC node
dt-bindings: arm: qcom: Separate LTE/WIFI SKU for sc7280-evoker
dt-bindings: arm: qcom: Document QDU1000/QRU1000 SoCs and boards
...
Link: https://lore.kernel.org/r/20221207153201.3233015-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/boot/dts/qcom-msm8226.dtsi')
-rw-r--r-- | arch/arm/boot/dts/qcom-msm8226.dtsi | 78 |
1 files changed, 65 insertions, 13 deletions
diff --git a/arch/arm/boot/dts/qcom-msm8226.dtsi b/arch/arm/boot/dts/qcom-msm8226.dtsi index cf2d56929428..4cba25dad8d6 100644 --- a/arch/arm/boot/dts/qcom-msm8226.dtsi +++ b/arch/arm/boot/dts/qcom-msm8226.dtsi @@ -7,6 +7,7 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/qcom,gcc-msm8974.h> +#include <dt-bindings/clock/qcom,mmcc-msm8974.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/power/qcom-rpmpd.h> #include <dt-bindings/reset/qcom,gcc-msm8974.h> @@ -298,6 +299,33 @@ #size-cells = <0>; }; + cci: cci@fda0c000 { + compatible = "qcom,msm8226-cci"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xfda0c000 0x1000>; + interrupts = <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>; + clocks = <&mmcc CAMSS_TOP_AHB_CLK>, + <&mmcc CAMSS_CCI_CCI_AHB_CLK>, + <&mmcc CAMSS_CCI_CCI_CLK>; + clock-names = "camss_top_ahb", + "cci_ahb", + "cci"; + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&cci_default>; + pinctrl-1 = <&cci_sleep>; + + status = "disabled"; + + cci_i2c0: i2c-bus@0 { + reg = <0>; + clock-frequency = <400000>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + usb: usb@f9a55000 { compatible = "qcom,ci-hdrc"; reg = <0xf9a55000 0x200>, @@ -344,6 +372,14 @@ #power-domain-cells = <1>; }; + mmcc: clock-controller@fd8c0000 { + compatible = "qcom,mmcc-msm8226"; + reg = <0xfd8c0000 0x6000>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; + tlmm: pinctrl@fd510000 { compatible = "qcom,msm8226-pinctrl"; reg = <0xfd510000 0x4000>; @@ -354,49 +390,65 @@ #interrupt-cells = <2>; interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; - blsp1_i2c1_pins: blsp1-i2c1 { + blsp1_i2c1_pins: blsp1-i2c1-state { pins = "gpio2", "gpio3"; function = "blsp_i2c1"; drive-strength = <2>; bias-disable; }; - blsp1_i2c2_pins: blsp1-i2c2 { + blsp1_i2c2_pins: blsp1-i2c2-state { pins = "gpio6", "gpio7"; function = "blsp_i2c2"; drive-strength = <2>; bias-disable; }; - blsp1_i2c3_pins: blsp1-i2c3 { + blsp1_i2c3_pins: blsp1-i2c3-state { pins = "gpio10", "gpio11"; function = "blsp_i2c3"; drive-strength = <2>; bias-disable; }; - blsp1_i2c4_pins: blsp1-i2c4 { + blsp1_i2c4_pins: blsp1-i2c4-state { pins = "gpio14", "gpio15"; function = "blsp_i2c4"; drive-strength = <2>; bias-disable; }; - blsp1_i2c5_pins: blsp1-i2c5 { + blsp1_i2c5_pins: blsp1-i2c5-state { pins = "gpio18", "gpio19"; function = "blsp_i2c5"; drive-strength = <2>; bias-disable; }; + cci_default: cci-default-state { + pins = "gpio29", "gpio30"; + function = "cci_i2c0"; + + drive-strength = <2>; + bias-disable; + }; + + cci_sleep: cci-sleep-state { + pins = "gpio29", "gpio30"; + function = "gpio"; + + drive-strength = <2>; + bias-disable; + }; + sdhc1_default_state: sdhc1-default-state { - clk { + clk-pins { pins = "sdc1_clk"; drive-strength = <10>; bias-disable; }; - cmd-data { + cmd-data-pins { pins = "sdc1_cmd", "sdc1_data"; drive-strength = <10>; bias-pull-up; @@ -404,13 +456,13 @@ }; sdhc2_default_state: sdhc2-default-state { - clk { + clk-pins { pins = "sdc2_clk"; drive-strength = <10>; bias-disable; }; - cmd-data { + cmd-data-pins { pins = "sdc2_cmd", "sdc2_data"; drive-strength = <10>; bias-pull-up; @@ -418,21 +470,21 @@ }; sdhc3_default_state: sdhc3-default-state { - clk { + clk-pins { pins = "gpio44"; function = "sdc3"; drive-strength = <8>; bias-disable; }; - cmd { + cmd-pins { pins = "gpio43"; function = "sdc3"; drive-strength = <8>; bias-pull-up; }; - data { + data-pins { pins = "gpio39", "gpio40", "gpio41", "gpio42"; function = "sdc3"; drive-strength = <8>; @@ -527,7 +579,7 @@ }; }; - rpm_msg_ram: memory@fc428000 { + rpm_msg_ram: sram@fc428000 { compatible = "qcom,rpm-msg-ram"; reg = <0xfc428000 0x4000>; }; |