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author | Zheng Yang <zhengyang@rock-chips.com> | 2018-09-07 12:28:01 +0200 |
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committer | Kishon Vijay Abraham I <kishon@ti.com> | 2018-09-10 14:37:36 +0530 |
commit | 4e3fe1cb25adf305ee6b73d83bd1f507fc9c975c (patch) | |
tree | a726b3ce9a75517a510fcb775345ff44abb08b1d /Documentation/devicetree/bindings/phy/phy-rockchip-inno-hdmi.txt | |
parent | 9be08a27a1588d0b0143486f96c7a08f8cfadae8 (diff) | |
download | linux-4e3fe1cb25adf305ee6b73d83bd1f507fc9c975c.tar.gz linux-4e3fe1cb25adf305ee6b73d83bd1f507fc9c975c.tar.bz2 linux-4e3fe1cb25adf305ee6b73d83bd1f507fc9c975c.zip |
dt-bindings: add binding for Rockchip hdmi phy using an Innosilicon IP
The phy is used so far in two Rockchip socs the rk3228 and the rk3328.
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Diffstat (limited to 'Documentation/devicetree/bindings/phy/phy-rockchip-inno-hdmi.txt')
-rw-r--r-- | Documentation/devicetree/bindings/phy/phy-rockchip-inno-hdmi.txt | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-hdmi.txt b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-hdmi.txt new file mode 100644 index 000000000000..710cccd5ee56 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-hdmi.txt @@ -0,0 +1,43 @@ +ROCKCHIP HDMI PHY WITH INNO IP BLOCK + +Required properties: + - compatible : should be one of the listed compatibles: + * "rockchip,rk3228-hdmi-phy", + * "rockchip,rk3328-hdmi-phy"; + - reg : Address and length of the hdmi phy control register set + - clocks : phandle + clock specifier for the phy clocks + - clock-names : string, clock name, must contain "sysclk" for system + control and register configuration, "refoclk" for crystal- + oscillator reference PLL clock input and "refpclk" for pclk- + based refeference PLL clock input. + - #clock-cells: should be 0. + - clock-output-names : shall be the name for the output clock. + - interrupts : phandle + interrupt specified for the hdmiphy interrupt + - #phy-cells : must be 0. See ./phy-bindings.txt for details. + +Optional properties for rk3328-hdmi-phy: + - nvmem-cells = phandle + nvmem specifier for the cpu-version efuse + - nvmem-cell-names : "cpu-version" to read the chip version, required + for adjustment to some frequency settings + +Example: + hdmi_phy: hdmi-phy@12030000 { + compatible = "rockchip,rk3228-hdmi-phy"; + reg = <0x12030000 0x10000>; + #phy-cells = <0>; + clocks = <&cru PCLK_HDMI_PHY>, <&xin24m>, <&cru DCLK_HDMIPHY>; + clock-names = "sysclk", "refoclk", "refpclk"; + #clock-cells = <0>; + clock-output-names = "hdmi_phy"; + status = "disabled"; + }; + +Then the PHY can be used in other nodes such as: + + hdmi: hdmi@200a0000 { + compatible = "rockchip,rk3228-dw-hdmi"; + ... + phys = <&hdmi_phy>; + phy-names = "hdmi"; + ... + }; |