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| author | Lucas De Marchi <lucas.demarchi@intel.com> | 2023-02-24 13:12:21 -0800 |
|---|---|---|
| committer | Lucas De Marchi <lucas.demarchi@intel.com> | 2023-02-25 11:24:09 -0800 |
| commit | c6a53c90e3be8b7e745a46c941631d0855648313 (patch) | |
| tree | c3fdaf6019b38b7d5c7256c528591a9429b07d0c | |
| parent | 0eb1173422f648a503a2ed1a8364f2d8bd7f690c (diff) | |
| download | linux-c6a53c90e3be8b7e745a46c941631d0855648313.tar.gz linux-c6a53c90e3be8b7e745a46c941631d0855648313.tar.bz2 linux-c6a53c90e3be8b7e745a46c941631d0855648313.zip | |
drm/i915: Move MCR_REG define to i915_reg_defs.h
Define MCR_REG() in the same header where i915_mcr_reg_t is defined,
like i915_reg_t and _MMIO(). It's a more natural place for such a
definition so it's not mixed with the registers for the platforms.
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230224211221.1557268-1-lucas.demarchi@intel.com
| -rw-r--r-- | drivers/gpu/drm/i915/gt/intel_gt_regs.h | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg_defs.h | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b/drivers/gpu/drm/i915/gt/intel_gt_regs.h index 4f5c06d60bcd..49a614b03fe8 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h +++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h @@ -9,8 +9,6 @@ #include "i915_reg_defs.h" #include "display/intel_display_reg_defs.h" /* VLV_DISPLAY_BASE */ -#define MCR_REG(offset) ((const i915_mcr_reg_t){ .reg = (offset) }) - /* * The perf control registers are technically multicast registers, but the * driver never needs to read/write them directly; we only use them to build diff --git a/drivers/gpu/drm/i915/i915_reg_defs.h b/drivers/gpu/drm/i915/i915_reg_defs.h index 983c5aa3045b..db26de6b57bc 100644 --- a/drivers/gpu/drm/i915/i915_reg_defs.h +++ b/drivers/gpu/drm/i915/i915_reg_defs.h @@ -165,6 +165,8 @@ typedef struct { u32 reg; } i915_mcr_reg_t; +#define MCR_REG(offset) ((const i915_mcr_reg_t){ .reg = (offset) }) + #define INVALID_MMIO_REG _MMIO(0) /* |