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author | Sohil Mehta <sohil.mehta@intel.com> | 2024-08-12 21:43:18 +0000 |
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committer | Thomas Gleixner <tglx@linutronix.de> | 2024-08-13 12:00:09 +0200 |
commit | a1fab3e69d9d0e9b62aab4450cb97da432ac3ef2 (patch) | |
tree | 03d2f646fc30fbea447525aab4385ee01179b38c | |
parent | 2db5f86c0d5da9ef0f3a1a5a9c460bf0f36268bf (diff) | |
download | linux-a1fab3e69d9d0e9b62aab4450cb97da432ac3ef2.tar.gz linux-a1fab3e69d9d0e9b62aab4450cb97da432ac3ef2.tar.bz2 linux-a1fab3e69d9d0e9b62aab4450cb97da432ac3ef2.zip |
x86/irq: Fix comment on IRQ vector layout
commit f5a3562ec9dd ("x86/irq: Reserve a per CPU IDT vector for posted
MSIs") changed the first system vector from LOCAL_TIMER_VECTOR to
POSTED_MSI_NOTIFICATION_VECTOR. Reflect this change in the vector layout
comment as well.
However, instead of pointing to the specific vector, use the
FIRST_SYSTEM_VECTOR indirection which essentially refers to the same.
This avoids unnecessary modifications to the same comment whenever
additional system vectors get added.
Signed-off-by: Sohil Mehta <sohil.mehta@intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
Link: https://lore.kernel.org/all/20240812214318.2715360-1-sohil.mehta@intel.com
-rw-r--r-- | arch/x86/include/asm/irq_vectors.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/x86/include/asm/irq_vectors.h b/arch/x86/include/asm/irq_vectors.h index 13aea8fc3d45..47051871b436 100644 --- a/arch/x86/include/asm/irq_vectors.h +++ b/arch/x86/include/asm/irq_vectors.h @@ -18,8 +18,8 @@ * Vectors 0 ... 31 : system traps and exceptions - hardcoded events * Vectors 32 ... 127 : device interrupts * Vector 128 : legacy int80 syscall interface - * Vectors 129 ... LOCAL_TIMER_VECTOR-1 - * Vectors LOCAL_TIMER_VECTOR ... 255 : special interrupts + * Vectors 129 ... FIRST_SYSTEM_VECTOR-1 : device interrupts + * Vectors FIRST_SYSTEM_VECTOR ... 255 : special interrupts * * 64-bit x86 has per CPU IDT tables, 32-bit has one shared IDT table. * |