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| author | Marek Vasut <marex@denx.de> | 2024-06-25 14:02:34 +0200 |
|---|---|---|
| committer | Robert Foss <rfoss@kernel.org> | 2024-06-27 11:07:08 +0200 |
| commit | 86b0e0c1ad47a01ad75ef0519d02d1f774fead55 (patch) | |
| tree | 14d1816bbb919a2123bf455d662f6f1200ed8b14 | |
| parent | 9c433c87e81c2dfc005b72b9fe822b065ffa044e (diff) | |
| download | linux-86b0e0c1ad47a01ad75ef0519d02d1f774fead55.tar.gz linux-86b0e0c1ad47a01ad75ef0519d02d1f774fead55.tar.bz2 linux-86b0e0c1ad47a01ad75ef0519d02d1f774fead55.zip | |
Revert "drm/bridge: tc358767: Set default CLRSIPO count"
This reverts commit 01338bb82fed40a6a234c2b36a92367c8671adf0.
With clock improvements in place, this seems to be no longer
necessary. Set the CLRSIPO to default setting recommended by
manufacturer.
Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Robert Foss <rfoss@kernel.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20240625120334.145320-5-marex@denx.de
| -rw-r--r-- | drivers/gpu/drm/bridge/tc358767.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c index 610df536a6ed..b8b7a227addf 100644 --- a/drivers/gpu/drm/bridge/tc358767.c +++ b/drivers/gpu/drm/bridge/tc358767.c @@ -1356,10 +1356,10 @@ static int tc_dsi_rx_enable(struct tc_data *tc) u32 value; int ret; - regmap_write(tc->regmap, PPI_D0S_CLRSIPOCOUNT, 25); - regmap_write(tc->regmap, PPI_D1S_CLRSIPOCOUNT, 25); - regmap_write(tc->regmap, PPI_D2S_CLRSIPOCOUNT, 25); - regmap_write(tc->regmap, PPI_D3S_CLRSIPOCOUNT, 25); + regmap_write(tc->regmap, PPI_D0S_CLRSIPOCOUNT, 5); + regmap_write(tc->regmap, PPI_D1S_CLRSIPOCOUNT, 5); + regmap_write(tc->regmap, PPI_D2S_CLRSIPOCOUNT, 5); + regmap_write(tc->regmap, PPI_D3S_CLRSIPOCOUNT, 5); regmap_write(tc->regmap, PPI_D0S_ATMR, 0); regmap_write(tc->regmap, PPI_D1S_ATMR, 0); regmap_write(tc->regmap, PPI_TX_RX_TA, TTA_GET | TTA_SURE); |