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| author | Rafał Miłecki <rafal@milecki.pl> | 2018-09-26 21:31:02 +0200 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2018-10-10 09:16:00 +0200 |
| commit | 3f9f82b3ffb8bfe01988c890e3a24328e9e1c1df (patch) | |
| tree | e6d0b8e5690a921097903b75332b52cae6641f55 | |
| parent | c5ad04dd44437223cd7b6e6a7a9777bcb2762fff (diff) | |
| download | linux-3f9f82b3ffb8bfe01988c890e3a24328e9e1c1df.tar.gz linux-3f9f82b3ffb8bfe01988c890e3a24328e9e1c1df.tar.bz2 linux-3f9f82b3ffb8bfe01988c890e3a24328e9e1c1df.zip | |
dt-bindings: pinctrl: document Broadcom Northstar pin mux controller
Northstar has mux controller just like Northstar Plus and Northstar2.
It's a bit different though (different registers & pins) so it requires
its own binding.
It's needed to allow other block bindings specify required mux setup.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| -rw-r--r-- | Documentation/devicetree/bindings/pinctrl/brcm,bcm4708-pinmux.txt | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,bcm4708-pinmux.txt b/Documentation/devicetree/bindings/pinctrl/brcm,bcm4708-pinmux.txt new file mode 100644 index 000000000000..af906f196e8c --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm4708-pinmux.txt @@ -0,0 +1,42 @@ +Broadcom Northstar pins mux controller + +Some of Northstar SoCs's pins can be used for various purposes thanks to the mux +controller. This binding allows describing mux controller and listing available +functions. They can be referenced later by other bindings to let system +configure controller correctly. + +A list of pins varies across chipsets so few bindings are available. + +Required properties: +- compatible: must be one of: + "brcm,bcm4708-pinmux" + "brcm,bcm4709-pinmux" + "brcm,bcm53012-pinmux" +- reg: iomem address range of CRU (Central Resource Unit) pin registers +- reg-names: "cru_gpio_control" - the only needed & supported reg right now + +Functions and their groups available for all chipsets: +- "spi": "spi_grp" +- "i2c": "i2c_grp" +- "pwm": "pwm0_grp", "pwm1_grp", "pwm2_grp", "pwm3_grp" +- "uart1": "uart1_grp" + +Additionally available on BCM4709 and BCM53012: +- "mdio": "mdio_grp" +- "uart2": "uart2_grp" +- "sdio": "sdio_pwr_grp", "sdio_1p8v_grp" + +For documentation of subnodes see: +Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt + +Example: + pinctrl@1800c1c0 { + compatible = "brcm,bcm4708-pinmux"; + reg = <0x1800c1c0 0x24>; + reg-names = "cru_gpio_control"; + + spi { + function = "spi"; + groups = "spi_grp"; + }; + }; |