From 9a530062d57fe4268eb5b561b1a46e826480f324 Mon Sep 17 00:00:00 2001 From: Aaron Liu Date: Mon, 17 May 2021 17:45:35 +0800 Subject: drm/amdgpu: modify system reference clock source for navi+ (V2) Starting from Navi+, the rlc reference clock is used for system clock from vbios gfx_info table. It is incorrect to use core_refclk_10khz of vbios smu_info table as system clock. Signed-off-by: Aaron Liu Reviewed-by: Alex Deucher Acked-by: Huang Rui Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c') diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c index 8c417014ca89..3b5d13189073 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c @@ -546,6 +546,21 @@ int amdgpu_atomfirmware_get_clock_info(struct amdgpu_device *adev) ret = 0; } + /* if asic is Navi+, the rlc reference clock is used for system clock + * from vbios gfx_info table */ + if (adev->asic_type >= CHIP_NAVI10) { + index = get_index_into_master_table(atom_master_list_of_data_tables_v2_1, + gfx_info); + if (amdgpu_atom_parse_data_header(mode_info->atom_context, index, NULL, + &frev, &crev, &data_offset)) { + struct atom_gfx_info_v2_2 *gfx_info = (struct atom_gfx_info_v2_2*) + (mode_info->atom_context->bios + data_offset); + if ((frev == 2) && (crev >= 2)) + spll->reference_freq = le32_to_cpu(gfx_info->rlc_gpu_timer_refclk); + ret = 0; + } + } + return ret; } -- cgit v1.2.3