From 72eb29951f98f612ba5a5bb8c58c87eaf8fb7351 Mon Sep 17 00:00:00 2001
From: Paul Burton <paul.burton@imgtec.com>
Date: Sat, 12 Aug 2017 21:36:34 -0700
Subject: MIPS: Use mips_gic_present() in place of gic_present
In preparation for removing the gic_present global variable, switch to
using the mips_gic_present() function instead. For the most part this is
a straightforward substitution. In cases which previously wrapped the
GIC case in an #ifdef CONFIG_MIPS_GIC that #ifdef has been removed,
since mips_gic_present() will return a compile-time constant false
allowing the affected code to be optimised out anyway.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/17044/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
---
arch/mips/mti-malta/malta-time.c | 19 +++++++++----------
1 file changed, 9 insertions(+), 10 deletions(-)
(limited to 'arch/mips/mti-malta/malta-time.c')
diff --git a/arch/mips/mti-malta/malta-time.c b/arch/mips/mti-malta/malta-time.c
index f0577469073d..7d53103b085f 100644
--- a/arch/mips/mti-malta/malta-time.c
+++ b/arch/mips/mti-malta/malta-time.c
@@ -40,6 +40,7 @@
#include <asm/time.h>
#include <asm/mc146818-time.h>
#include <asm/msc01_ic.h>
+#include <asm/mips-cps.h>
#include <asm/mips-boards/generic.h>
#include <asm/mips-boards/maltaint.h>
@@ -85,7 +86,7 @@ static void __init estimate_frequencies(void)
local_irq_save(flags);
- if (gic_present)
+ if (mips_gic_present())
clear_gic_config(GIC_CONFIG_COUNTSTOP);
/*
@@ -95,7 +96,7 @@ static void __init estimate_frequencies(void)
while (CMOS_READ(RTC_REG_A) & RTC_UIP);
while (!(CMOS_READ(RTC_REG_A) & RTC_UIP));
start = read_c0_count();
- if (gic_present)
+ if (mips_gic_present())
gicstart = read_gic_counter();
/* Wait for falling edge before reading RTC. */
@@ -105,7 +106,7 @@ static void __init estimate_frequencies(void)
/* Read counters again exactly on rising edge of update flag. */
while (!(CMOS_READ(RTC_REG_A) & RTC_UIP));
count = read_c0_count();
- if (gic_present)
+ if (mips_gic_present())
giccount = read_gic_counter();
/* Wait for falling edge before reading RTC again. */
@@ -128,7 +129,7 @@ static void __init estimate_frequencies(void)
count /= secs;
mips_hpt_frequency = count;
- if (gic_present) {
+ if (mips_gic_present()) {
giccount = div_u64(giccount - gicstart, secs);
gic_frequency = giccount;
}
@@ -154,7 +155,7 @@ int get_c0_fdc_int(void)
if (cpu_has_veic)
return -1;
- else if (gic_present)
+ else if (mips_gic_present())
return gic_get_c0_fdc_int();
else if (cp0_fdc_irq >= 0)
return MIPS_CPU_IRQ_BASE + cp0_fdc_irq;
@@ -167,7 +168,7 @@ int get_c0_perfcount_int(void)
if (cpu_has_veic) {
set_vi_handler(MSC01E_INT_PERFCTR, mips_perf_dispatch);
mips_cpu_perf_irq = MSC01E_INT_BASE + MSC01E_INT_PERFCTR;
- } else if (gic_present) {
+ } else if (mips_gic_present()) {
mips_cpu_perf_irq = gic_get_c0_perfcount_int();
} else if (cp0_perfcount_irq >= 0) {
mips_cpu_perf_irq = MIPS_CPU_IRQ_BASE + cp0_perfcount_irq;
@@ -184,7 +185,7 @@ unsigned int get_c0_compare_int(void)
if (cpu_has_veic) {
set_vi_handler(MSC01E_INT_CPUCTR, mips_timer_dispatch);
mips_cpu_timer_irq = MSC01E_INT_BASE + MSC01E_INT_CPUCTR;
- } else if (gic_present) {
+ } else if (mips_gic_present()) {
mips_cpu_timer_irq = gic_get_c0_compare_int();
} else {
mips_cpu_timer_irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq;
@@ -258,8 +259,7 @@ void __init plat_time_init(void)
setup_pit_timer();
#endif
-#ifdef CONFIG_MIPS_GIC
- if (gic_present) {
+ if (mips_gic_present()) {
freq = freqround(gic_frequency, 5000);
printk("GIC frequency %d.%02d MHz\n", freq/1000000,
(freq%1000000)*100/1000000);
@@ -268,5 +268,4 @@ void __init plat_time_init(void)
timer_probe();
#endif
}
-#endif
}
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