diff options
Diffstat (limited to 'drivers/gpu/drm/amd/display/dmub')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dmub/dmub_srv.h | 41 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/dmub/dmub_srv_stat.h | 41 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/dmub/src/Makefile | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c | 32 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h | 11 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c | 31 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/dmub/src/dmub_srv_stat.c | 105 |
7 files changed, 258 insertions, 5 deletions
diff --git a/drivers/gpu/drm/amd/display/dmub/dmub_srv.h b/drivers/gpu/drm/amd/display/dmub/dmub_srv.h index 863cd9cc93ff..6e4f558fe97e 100644 --- a/drivers/gpu/drm/amd/display/dmub/dmub_srv.h +++ b/drivers/gpu/drm/amd/display/dmub/dmub_srv.h @@ -107,6 +107,15 @@ enum dmub_window_id { DMUB_WINDOW_TOTAL, }; +/* enum dmub_notification_type - dmub outbox notification identifier */ +enum dmub_notification_type { + DMUB_NOTIFICATION_NO_DATA = 0, + DMUB_NOTIFICATION_AUX_REPLY, + DMUB_NOTIFICATION_HPD, + DMUB_NOTIFICATION_HPD_IRQ, + DMUB_NOTIFICATION_MAX +}; + /** * struct dmub_region - dmub hw memory region * @base: base address for region, must be 256 byte aligned @@ -256,6 +265,13 @@ struct dmub_srv_hw_funcs { void (*set_inbox1_wptr)(struct dmub_srv *dmub, uint32_t wptr_offset); + void (*setup_out_mailbox)(struct dmub_srv *dmub, + const struct dmub_region *outbox1); + + uint32_t (*get_outbox1_wptr)(struct dmub_srv *dmub); + + void (*set_outbox1_rptr)(struct dmub_srv *dmub, uint32_t rptr_offset); + uint32_t (*emul_get_inbox1_rptr)(struct dmub_srv *dmub); void (*emul_set_inbox1_wptr)(struct dmub_srv *dmub, uint32_t wptr_offset); @@ -338,6 +354,11 @@ struct dmub_srv { struct dmub_srv_base_funcs funcs; struct dmub_srv_hw_funcs hw_funcs; struct dmub_rb inbox1_rb; + /** + * outbox1_rb is accessed without locks (dal & dc) + * and to be used only in dmub_srv_stat_get_notification() + */ + struct dmub_rb outbox1_rb; bool sw_init; bool hw_init; @@ -351,6 +372,26 @@ struct dmub_srv { }; /** + * struct dmub_notification - dmub notification data + * @type: dmub notification type + * @link_index: link index to identify aux connection + * @result: USB4 status returned from dmub + * @pending_notification: Indicates there are other pending notifications + * @aux_reply: aux reply + * @hpd_status: hpd status + */ +struct dmub_notification { + enum dmub_notification_type type; + uint8_t link_index; + uint8_t result; + bool pending_notification; + union { + struct aux_reply_data aux_reply; + enum dp_hpd_status hpd_status; + }; +}; + +/** * DMUB firmware version helper macro - useful for checking if the version * of a firmware to know if feature or functionality is supported or present. */ diff --git a/drivers/gpu/drm/amd/display/dmub/dmub_srv_stat.h b/drivers/gpu/drm/amd/display/dmub/dmub_srv_stat.h new file mode 100644 index 000000000000..6c78aa406e90 --- /dev/null +++ b/drivers/gpu/drm/amd/display/dmub/dmub_srv_stat.h @@ -0,0 +1,41 @@ +/* + * Copyright 2020 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: AMD + * + */ + +#ifndef _DMUB_SRV_STAT_H_ +#define _DMUB_SRV_STAT_H_ + +/** + * DOC: DMUB_SRV STAT Interface + * + * These interfaces are called without acquiring DAL and DC locks. + * Hence, there is limitations on whese interfaces can access. Only + * variables exclusively defined for these interfaces can be modified. + */ +#include "dmub_srv.h" + +enum dmub_status dmub_srv_stat_get_notification(struct dmub_srv *dmub, + struct dmub_notification *notify); + +#endif /* _DMUB_SRV_STAT_H_ */ diff --git a/drivers/gpu/drm/amd/display/dmub/src/Makefile b/drivers/gpu/drm/amd/display/dmub/src/Makefile index 945287164cf2..7495c23c73a9 100644 --- a/drivers/gpu/drm/amd/display/dmub/src/Makefile +++ b/drivers/gpu/drm/amd/display/dmub/src/Makefile @@ -20,7 +20,7 @@ # OTHER DEALINGS IN THE SOFTWARE. # -DMUB = dmub_srv.o dmub_reg.o dmub_dcn20.o dmub_dcn21.o +DMUB = dmub_srv.o dmub_srv_stat.o dmub_reg.o dmub_dcn20.o dmub_dcn21.o DMUB += dmub_dcn30.o dmub_dcn301.o DMUB += dmub_dcn302.o diff --git a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c index ea30da4f794f..071331bcc427 100644 --- a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c +++ b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c @@ -135,6 +135,8 @@ void dmub_dcn20_reset(struct dmub_srv *dmub) REG_UPDATE(MMHUBBUB_SOFT_RESET, DMUIF_SOFT_RESET, 1); REG_WRITE(DMCUB_INBOX1_RPTR, 0); REG_WRITE(DMCUB_INBOX1_WPTR, 0); + REG_WRITE(DMCUB_OUTBOX1_RPTR, 0); + REG_WRITE(DMCUB_OUTBOX1_WPTR, 0); REG_WRITE(DMCUB_SCRATCH0, 0); } @@ -287,6 +289,36 @@ void dmub_dcn20_set_inbox1_wptr(struct dmub_srv *dmub, uint32_t wptr_offset) REG_WRITE(DMCUB_INBOX1_WPTR, wptr_offset); } +void dmub_dcn20_setup_out_mailbox(struct dmub_srv *dmub, + const struct dmub_region *outbox1) +{ + /* New firmware can support CW4 for the outbox. */ + if (dmub_dcn20_use_cached_inbox(dmub)) + REG_WRITE(DMCUB_OUTBOX1_BASE_ADDRESS, outbox1->base); + else + REG_WRITE(DMCUB_OUTBOX1_BASE_ADDRESS, 0x80002000); + + REG_WRITE(DMCUB_OUTBOX1_SIZE, outbox1->top - outbox1->base); +} + +uint32_t dmub_dcn20_get_outbox1_wptr(struct dmub_srv *dmub) +{ + /** + * outbox1 wptr register is accessed without locks (dal & dc) + * and to be called only by dmub_srv_stat_get_notification() + */ + return REG_READ(DMCUB_OUTBOX1_WPTR); +} + +void dmub_dcn20_set_outbox1_rptr(struct dmub_srv *dmub, uint32_t rptr_offset) +{ + /** + * outbox1 rptr register is accessed without locks (dal & dc) + * and to be called only by dmub_srv_stat_get_notification() + */ + REG_WRITE(DMCUB_OUTBOX1_RPTR, rptr_offset); +} + bool dmub_dcn20_is_hw_init(struct dmub_srv *dmub) { uint32_t is_hw_init; diff --git a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h index 30c6d631a431..df85c3b86607 100644 --- a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h +++ b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h @@ -40,6 +40,10 @@ struct dmub_srv; DMUB_SR(DMCUB_INBOX1_SIZE) \ DMUB_SR(DMCUB_INBOX1_RPTR) \ DMUB_SR(DMCUB_INBOX1_WPTR) \ + DMUB_SR(DMCUB_OUTBOX1_BASE_ADDRESS) \ + DMUB_SR(DMCUB_OUTBOX1_SIZE) \ + DMUB_SR(DMCUB_OUTBOX1_RPTR) \ + DMUB_SR(DMCUB_OUTBOX1_WPTR) \ DMUB_SR(DMCUB_REGION3_CW0_OFFSET) \ DMUB_SR(DMCUB_REGION3_CW1_OFFSET) \ DMUB_SR(DMCUB_REGION3_CW2_OFFSET) \ @@ -185,6 +189,13 @@ uint32_t dmub_dcn20_get_inbox1_rptr(struct dmub_srv *dmub); void dmub_dcn20_set_inbox1_wptr(struct dmub_srv *dmub, uint32_t wptr_offset); +void dmub_dcn20_setup_out_mailbox(struct dmub_srv *dmub, + const struct dmub_region *outbox1); + +uint32_t dmub_dcn20_get_outbox1_wptr(struct dmub_srv *dmub); + +void dmub_dcn20_set_outbox1_rptr(struct dmub_srv *dmub, uint32_t rptr_offset); + bool dmub_dcn20_is_hw_init(struct dmub_srv *dmub); bool dmub_dcn20_is_supported(struct dmub_srv *dmub); diff --git a/drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c b/drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c index 61f64a295f06..6943bf679b42 100644 --- a/drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c +++ b/drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c @@ -46,8 +46,8 @@ /* Context size. */ #define DMUB_CONTEXT_SIZE (512 * 1024) -/* Mailbox size */ -#define DMUB_MAILBOX_SIZE (DMUB_RB_SIZE) +/* Mailbox size : Ring buffers are required for both inbox and outbox */ +#define DMUB_MAILBOX_SIZE ((2 * DMUB_RB_SIZE)) /* Default state size if meta is absent. */ #define DMUB_FW_STATE_SIZE (64 * 1024) @@ -157,6 +157,11 @@ static bool dmub_srv_hw_setup(struct dmub_srv *dmub, enum dmub_asic asic) funcs->enable_dmub_boot_options = dmub_dcn20_enable_dmub_boot_options; funcs->skip_dmub_panel_power_sequence = dmub_dcn20_skip_dmub_panel_power_sequence; + // Out mailbox register access functions for RN and above + funcs->setup_out_mailbox = dmub_dcn20_setup_out_mailbox; + funcs->get_outbox1_wptr = dmub_dcn20_get_outbox1_wptr; + funcs->set_outbox1_rptr = dmub_dcn20_set_outbox1_rptr; + if (asic == DMUB_ASIC_DCN21) { dmub->regs = &dmub_srv_dcn21_regs; @@ -397,7 +402,7 @@ enum dmub_status dmub_srv_hw_init(struct dmub_srv *dmub, struct dmub_rb_init_params rb_params; struct dmub_window cw0, cw1, cw2, cw3, cw4, cw5, cw6; - struct dmub_region inbox1; + struct dmub_region inbox1, outbox1; if (!dmub->sw_init) return DMUB_STATUS_INVALID; @@ -444,8 +449,17 @@ enum dmub_status dmub_srv_hw_init(struct dmub_srv *dmub, cw4.region.base = DMUB_CW4_BASE; cw4.region.top = cw4.region.base + mail_fb->size; + /** + * Doubled the mailbox region to accomodate inbox and outbox. + * Note: Currently, currently total mailbox size is 16KB. It is split + * equally into 8KB between inbox and outbox. If this config is + * changed, then uncached base address configuration of outbox1 + * has to be updated in funcs->setup_out_mailbox. + */ inbox1.base = cw4.region.base; - inbox1.top = cw4.region.top; + inbox1.top = cw4.region.base + DMUB_RB_SIZE; + outbox1.base = inbox1.top; + outbox1.top = cw4.region.top; cw5.offset.quad_part = tracebuff_fb->gpu_addr; cw5.region.base = DMUB_CW5_BASE; @@ -465,6 +479,8 @@ enum dmub_status dmub_srv_hw_init(struct dmub_srv *dmub, if (dmub->hw_funcs.setup_mailbox) dmub->hw_funcs.setup_mailbox(dmub, &inbox1); + if (dmub->hw_funcs.setup_out_mailbox) + dmub->hw_funcs.setup_out_mailbox(dmub, &outbox1); } if (mail_fb) { @@ -474,6 +490,13 @@ enum dmub_status dmub_srv_hw_init(struct dmub_srv *dmub, rb_params.capacity = DMUB_RB_SIZE; dmub_rb_init(&dmub->inbox1_rb, &rb_params); + + // Initialize outbox1 ring buffer + rb_params.ctx = dmub; + rb_params.base_address = (void *) ((uint64_t) (mail_fb->cpu_addr) + DMUB_RB_SIZE); + rb_params.capacity = DMUB_RB_SIZE; + dmub_rb_init(&dmub->outbox1_rb, &rb_params); + } if (dmub->hw_funcs.reset_release) diff --git a/drivers/gpu/drm/amd/display/dmub/src/dmub_srv_stat.c b/drivers/gpu/drm/amd/display/dmub/src/dmub_srv_stat.c new file mode 100644 index 000000000000..e6f3bfab33d3 --- /dev/null +++ b/drivers/gpu/drm/amd/display/dmub/src/dmub_srv_stat.c @@ -0,0 +1,105 @@ +/* + * Copyright 2019 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: AMD + * + */ + +#include "dmub/dmub_srv_stat.h" +#include "dmub/inc/dmub_cmd.h" + +/** + * DOC: DMUB_SRV STAT Interface + * + * These interfaces are called without acquiring DAL and DC locks. + * Hence, there is limitations on whese interfaces can access. Only + * variables exclusively defined for these interfaces can be modified. + */ + +/** + ***************************************************************************** + * Function: dmub_srv_stat_get_notification + * + * @brief + * Retrieves a dmub outbox notification, set up dmub notification + * structure with message information. Also a pending bit if queue + * is having more notifications + * + * @param [in] dmub: dmub srv structure + * @param [out] pnotify: dmub notification structure to be filled up + * + * @return + * dmub_status + ***************************************************************************** + */ +enum dmub_status dmub_srv_stat_get_notification(struct dmub_srv *dmub, + struct dmub_notification *notify) +{ + /** + * This function is called without dal and dc locks, so + * we shall not modify any dmub variables, only dmub->outbox1_rb + * is exempted as it is exclusively accessed by this function + */ + union dmub_rb_out_cmd cmd = {0}; + + if (!dmub->hw_init) { + notify->type = DMUB_NOTIFICATION_NO_DATA; + notify->pending_notification = false; + return DMUB_STATUS_INVALID; + } + + /* Get write pointer which is updated by dmub */ + dmub->outbox1_rb.wrpt = dmub->hw_funcs.get_outbox1_wptr(dmub); + + if (!dmub_rb_out_front(&dmub->outbox1_rb, &cmd)) { + notify->type = DMUB_NOTIFICATION_NO_DATA; + notify->pending_notification = false; + return DMUB_STATUS_OK; + } + + switch (cmd.cmd_common.header.type) { + case DMUB_OUT_CMD__DP_AUX_REPLY: + notify->type = DMUB_NOTIFICATION_AUX_REPLY; + notify->link_index = cmd.dp_aux_reply.control.instance; + notify->result = cmd.dp_aux_reply.control.result; + dmub_memcpy((void *)¬ify->aux_reply, + (void *)&cmd.dp_aux_reply.reply_data, sizeof(struct aux_reply_data)); + break; + default: + notify->type = DMUB_NOTIFICATION_NO_DATA; + break; + } + + /* Pop outbox1 ringbuffer and update read pointer */ + dmub_rb_pop_front(&dmub->outbox1_rb); + dmub->hw_funcs.set_outbox1_rptr(dmub, dmub->outbox1_rb.rptr); + + /** + * Notify dc whether dmub has a pending outbox message, + * this is to avoid one more call to dmub_srv_stat_get_notification + */ + if (dmub_rb_empty(&dmub->outbox1_rb)) + notify->pending_notification = false; + else + notify->pending_notification = true; + + return DMUB_STATUS_OK; +} |